
I’m an ASIC engineer on Meta’s MTIA architecture team. I build performance models that help evaluate new hardware ideas before silicon exists and guide design decisions across ASIC programs.
If compute buys intelligence, architecture sets the price. I work to democratize intelligence by making every unit of compute count.
I earned my PhD and master’s degrees in Electrical & Computer Engineering at the University of Washington, advised by Prof. Michael Taylor and Prof. Richard Shi. Before that, I received my bachelor’s degree from Shanghai Jiao Tong University and have interned at Microsoft and Fudan University.
Outside of work, I’m passionate about races that test the limits of endurance, speed, and technique, including but not limited to marathons, trail running, cycling, triathlons, and Formula 1. I train for a couple of them and wisely enjoy the others from my couch.
Whether you’re interested in AI hardware or endurance sports, I’d love to connect.